Course Description
Inner workings of modern digital computer systems and tradeoffs at the hardware-software interface. Topics include: instructions set design, memory systems, input-output systems, interrupts and exceptions, pipelining, performance and cost analysis, assembly language programming, and a survey of advanced architectures.
Learning Outcomes
Upon completion of the course, students are expected to be able to:
- Understand the basic concepts of digital logic and build the small circuits involved in computer systems
- Describe the interaction between software and hardware and instruction set architecture
- Write and execute small programs of a few hundred lines in assembly language
- Define the basic concepts of modern computer hardware, including datapath, control, memory and input/output
- Describe the organizational paradigms that determine the capability and performance of computer systems
Prerequisite
Exclusion(s): ELEC 2300 Prerequisite(s): COMP 1004 (prior to 2013-14) OR COMP 2011 OR COMP 2012H
Textbook
Lectures
Section |
Instructor |
Time |
Venue |
L1 |
Dr. Cindy LI |
TuTh 1:30PM - 2:50PM |
Room 2502 (Lift 25/26) |
Lab and Tutorial
Academic Integrity
Exams, projects, quizzes, papers and other kinds of assessments are essential to the learning process. Honesty and integrity are central to academic work. See regulations for student conduct and academic integrity.
Grading Scheme
2 Quizzes (conducted during lab session, provide a fruitful learning experience of the course and reinforce the learning process) |
15% |
1 Individual Programming Project (The deadline is hard deadline) |
15% |
Midterm Exam |
30% |
Final Exam |
40% |
In this project, you are going to implement a Space game with MIPS assembly language. The submission deadline is Nov 30, 5pm via Canvas.
Read the project description carefully. Ask questions on our course Facebook during your implementation.
- Quiz 1 Oct 5 during lab (please go to your registered lab session).
- Midterm Oct 12 (Mon) 7-9pm LTB.
- Quiz 2 Nov 9 during lab (please go to your registered lab session).
- Final exam Dec 11 (Fri) 12:30-15:30 at LG1 Table Tennis Room.
Quiz 1 will be 40 minutes. Please arrive on time. The quiz tests your knowledge on digital circuit and the use of Logisim. You will be given a circuit, open and play it in Logisim, and answer several questions in answer sheet. You do not need to draw any circuit in Logisim. Lab 1 and Lab 2 will have different set of circuits and questions.
Midterm will cover everything till ISA 3 More MIPS instructions (page 13 of ISA note part 2). Here's a sample past midterm for your reference.
Quiz 2 will be 40 minutes. Please arrive on time. The quiz tests your knowledge on MIPS. Lab 1 and Lab 2 will have different set of circuits and questions.
Final exam will cover everything we learned in this semester, with major focus on topics not included in midterm. Here's a sample past midterm for your reference.
Please note in the past offerings, we used to cover mutlti-cycle implementation. This is replaced with single-cycle pipeline in Fall 2015 offering. You can ignore the related questions if you come across them in past papers.
You can check your grade on Canvas